The following relates to the semiconductor arts, electronics arts, and related arts.
Interband tunnel diodes (ITDs) have numerous potential and actual applications, including but not limited to local oscillators, frequency locking circuits, advanced SRAM circuits, highly integrated analog/digital converters, high speed digital latches, and so forth. Tunneling is a very fast phenomenon; hence ITD-based devices typically are operable at high frequencies.
Interband tunneling diode devices include degenerately doped n-type and p-type regions, sometimes very thin, in sufficiently close relative proximity so that electrons and holes can cross the p/n junction by quantum mechanical tunneling. In some ITD devices, the degenerate doping is achieved using delta doping to concentrate the doping density to approximately the solid solubility limit. If the delta doping is very thin and of high enough doping density, it can also lead to quantum well regions that confine carriers. With a quantum well on the p-side and n-side of the p/n junction diode, resonant interband tunneling (e.g. RITD) can occur when the quantum wells are spaced closed enough for an overlap of the carrier wavefunctions.
Silicon based ITD devices have been produced, for example as described in Berger et al., U.S. Pat. No. 6,803,598 and Berger et al. U.S. Publ. Appl. No. 2003/0049894 A1. Both of these references are incorporated herein by reference in their entireties. As set forth in U.S. Pat. No. 6,803,598 and U.S. Publ. Appl. No. 2003/0049894 A1, silicon based interband tunneling diodes comprise “Si-compatible” layers which refers to any material which may be readily deposited, oxidized, converted, or grown on a Si substrate or device. Si-compatible layers include but are not limited to the following: Si, Ge, C, Sn, Si1-xGex, Si1-xCx, Si1-xSnx, Si1-x-y GexCy, Si1-x-y-zGexCySnz, Si1-xOx, Si1-xNx, Al1-xOx, or combinations thereof. Si-compatible layers include but are not limited to group IV alloys. Typically, silicon based ITD devices are grown on a silicon substrate by a relatively low temperature method so as to limit diffusion of the high concentration dopants, and layers of high germanium content have been used to further constrain diffusion of p-type dopants. Post-growth rapid thermal annealing at temperatures well above the growth temperature for a relatively short anneal time has been found to have beneficial effects.
However, further improvements in the peak-to-valley current ratio (PVCR) and other device parameters of interest are still sought. Existing Si-based ITD designs do not provide sufficient flexibility to achieve desired improvements.
One perceived limitation is an upper limit on the integrated amount of germanium that can be incorporated into the structure due to crystallographic strain limitations. Stoffel et al., “Epitaxial Growth of SiGe Interband Tunneling Diodes on Si(001) and on Si0.7Ge0.3 Virtual Substrates”, IEICE Trans. Electron. Vol. E89-C, no. 7, pp. 921-25 (2006) have attempted to overcome this limitation by forming Si-based ITD devices on a “virtual” Si0.7Ge0.3 substrate. Stoffel et al. is incorporated herein by reference in its entirety. In the approach of Stoffel et al., a graded buffer starting with silicon but gradually adding increasing germanium content is deliberately deposited in a manner that exceeds the critical thickness for relaxation of the developing crystallographic strain. As a result, the top of this graded buffer is substantially strain-relaxed, that is, has a lattice constant substantially corresponding to unstrained Si0.7Ge0.3. Using this relaxed Si0.7Ge0.3 layer as a virtual substrate of larger lattice constant than silicon, Stoffel et al. were able to fabricate ITD devices with higher germanium content. However, the highest room temperature PVCR achieved was 1.36. For comparison, Jin et al., “RF performance and Modeling of Si/SiGe Resonant Interband Tunneling Diodes”, IEEE Transactions on Electron Devices vol. 52 no. 10, pp. 2129-35 (2005) report PVCR values as high as 2.9 for a device structure incorporating a backside layer of Si0.6Ge0.4 to prevent diffusion of the boron dopant away from the p-type δ-doping. Jin et al., “RF performance and Modeling of Si/SiGe Resonant Interband Tunneling Diodes”, IEEE Transactions on Electron Devices vol. 52 no. 10, pp. 2129-35 (2005) is incorporated herein by reference in its entirety.
The results of Stoffel et al. may be affected by lower substrate quality due to dislocations in the strain-relaxed Si0.7Ge0.3 virtual substrate. However, even allowing for this, the approach of Stoffel has certain disadvantages. For example, the higher germanium content which is the object of the approach of Stoffel et al. can introduce detrimental alloy scattering. Accordingly, the ability to further enrich layers with germanium using a virtual substrate, as suggested by Stoffel et al., may ultimately be an ineffective avenue toward further improvement.